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  NameCategoryDevelopment KitFamilyQuartus II VersionVendorDownloads
    Adapting Digilent PmodCLP LCD to DE10 Lite Development Kit Arduino Shield Header  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera28
    ADC and Audio Monitor  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas102
    ADC Data Capture with Hardware Streaming using ADC Toolkit Display  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow95
    ADC Data Capture with Nios II Processor  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow102
    ADC example for use with Board Test System Monitor Panel  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera124
    ADC_MIC_LCD  Design ExampleMAX 10 NEEKMAX 1016.0.0Terasic55
    Arrow Max 10 DECA Baseline Pinout  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow36
    Baseline Pinout - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera46
    Basic VGA Controller Design Example  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera25
  Beamforming - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
      Become an FPGA Designer in 4 hour lab solution  TutorialBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Altera110
    BeMicro MAX 10 Kit Baseline Pinout  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Arrow125
    Board Update Portal: Nios II, Flash,DDR3, Triple-Speed Ethernet, UART  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera167
  Cholesky Solver - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
    CompactFlash+ Interface (AN 492)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera18
    Crosspoint Switch Matrices in MAX devices (AN 294 - custom example)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera10
    Crosspoint Switch Matrices in MAX devices (AN 294 - switch example)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera9
    Custom Instruction and Nios II Processor   Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera21
    Custom Instruction and Nios II Processor - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera14
    Custom Instruction for MAX 10 Nios II Embedded Evaluation Kit  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera8
    Custom Instruction for Nios II Processor   Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera13
    Custom Instruction for Nios II processor- DECA Board  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Altera20
    Custom Instruction with Nios II   Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Altera27
    Custom Instruction with Nios II Design  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Altera14
    Custom Instruction with Nios II Processor  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera88
    DC-DC Converter Control with ADSP Builder  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Present Power Systems, LLC42
    DDR3 with Board Test System Console  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera65
    DECA USB to SDHC Demo   Design ExampleArrow MAX 10 DECAMAX 1016.0.0Altera24
  Direct RF - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
    Drive on Chip Multi Axis Motor Control (FalconEye) (AN773)  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera24
    Drive on Chip Multi Axis Motor Control (Tandem) (AN773)  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera23
    Dual Boot Design Example - MAX10 DE10 Lite   Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera26
    Dual Boot Design Example for DECA Board  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow22
    Dual Boot Design Example for Odyssey Development Kit   Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Altera20
    Dual Boot Development Kit   Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera55
    Dual Configuration and PWM Controls  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas14
    Dualboot Design Example  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera101
    Dualboot Design Example-BeMicro  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Arrow21
    EBV HyperMax Baseline Pinout  Design ExampleEBV HyperMAXMAX 1016.0.0EBV Elektronik GmbH Co. KG10
  Echo Cancellation - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  Farrow - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  FIFOed Avalon Uart  Design Example \ Outside Design StoreNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera10
  FIR Filter - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
      First FPGA Design For MAX10 NEEK Board  TutorialMAX 10 NEEKMAX 1016.0.0Terasic27
      First Nios ii Design Example for MAX 10 NEEK Board  TutorialMAX 10 NEEKMAX 1016.0.0Terasic23
  Folding CFR - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
      FPGA Intro Example with PLL, Mux and Counter  TutorialMAX 10 FPGA Development KitMAX 1016.0.0Altera75
      FPGA Intro Lab with PLL, Mux and Counter  TutorialArrow MAX 10 DECAMAX 1016.0.0Arrow25
    Framebuffer Driven LCD Display  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera32
    Frequency Detect  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas15
    GPIO Pin Expansion Using I2C Bus Interface (AN 494)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera66
    GPIO, QSPI Flash, UART, ADC, LEDs, Switches Design Example  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera247
    GSensor - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera26
    gsensor_lightsonsor_lcd  Design ExampleMAX 10 NEEKMAX 1016.0.0Terasic10
    HDMI_RX_LCD  Design ExampleMAX 10 NEEKMAX 1016.0.0Terasic43
      Hello World Example with Off Chip Memory Usage   TutorialBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Altera61
    Hello World with Nios II LCD  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera61
    humidity_temperature_lcd  Design ExampleMAX 10 NEEKMAX 1016.0.0Terasic19
    I2C Battery Gauge Interface (AN 493)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera26
    I2C Remote System Update Example  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera186
    I2C Template  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas44
    IDE/ATA Controller (AN 495)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera18
    Implementing an SMBus Controller (AN 502)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera20
    Implementing LED drivers in MAX devices (AN 286)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera23
  Initialyze test - delete me  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.1Initialyze0
    Introduction to Digital Logic - MAX10 DE10 Lite   TutorialMAX 10 DE10 - LiteMAX 1016.0.0Altera0
    KElm Embedded System On Module Baseline Pinout Design  Design ExampleKElm Embedded System On Module (SoM)MAX 1016.0.0Altera4
    LCD Painter  Design ExampleMAX 10 NEEKMAX 1016.0.0Terasic43
    lcd_camera  Design ExampleMAX 10 NEEKMAX 1016.0.0Terasic31
    LED Blink Using Power Sequencing (AN 498)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera23
  LTE Transmitter - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
    MAX 10 ADC with Threshold Violation Detection  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera49
    MAX 10 Evaluation Kit Baseline Pinout  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera206
    MAX 10 NEEK Baseline Pinout  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera17
    MAX 10 Single-Port Triple Speed Ethernet and On-Board PHY Chip Design Example  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera124
    MAX10 10M50 Development Kit GHRD with Nios II/DDR3/QSPI Flash/Ethernet/mSGDMA/UART/ADC with Linux  Design Example \ Linux Outside Design StoreMAX 10 FPGA Development KitMAX 1016.0.0AlteraNA
    Max10 DDR3 design with debug feature  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera69
    Max10 Development Kit Baseline Pinout  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera119
    MAX10 Remote System Upgrade (RSU) over UART for Nios II Processor  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera134
    max10_neek_tft_controller   Design ExampleMAX 10 NEEKMAX 1016.0.2Altera13
    Microcontroller I/O Expander (AN 265)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera22
    MIPI CSI2 RX/TX with passive D-PHY  Design ExampleMAX 10 FPGA 10M50 Evaluation Kit MAX 1016.0.0Foresys171
  Motor Control - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  Multi Channel QRD - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
    Multiplexing SDIO Devices (AN 509)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera15
    NAND Flash Memory Interface (AN 500)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera26
    NEEK 10 test system - running uC/OS  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera7
      Nios II + Qsys "Hello World" Lab  TutorialMAX 10 FPGA Development KitMAX 1016.0.0Altera110
      Nios II + Qsys "Hello World" Lab - MAX10 DE10 Lite  TutorialMAX 10 DE10 - LiteMAX 1016.0.0Terasic28
    Nios II ADC /LCD Controller Design Example  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera134
    Nios II ADC /LCD Controller Design Example (10M50 Dev Kit)  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera50
    Nios II based Gesture Sensor lab   Design ExampleArrow MAX 10 DECAMAX 1016.0.0Altera26
    Nios II Design Example Using Bluetooth and Wifi  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow23
    Nios II Dual Boot Example for MAX 10 NEEK  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera20
    Nios II Ethernet Simple Socket Server for NEEK  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera28
    Nios II Full Featured Reference Design - BeMicro  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Arrow90
    Nios II On-die Temperature Sensor Design Example  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera40
    Nios II On-die Temp Sensor (Odyssey)  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Altera11
    Nios II On-die Temperature Sensor - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera18
    Nios II On-die Temperature Sensor Design (DECA)   Design ExampleArrow MAX 10 DECAMAX 1016.0.0Altera28
    Nios II On-die Temperature Sensor Design Example (BeMicro)  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Altera66
    Nios II On-die Temperature Sensor Design Example 2  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera90
    Nios II On-die Temperature Sensor/LCD Design Example   Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera67
    Nios II Qsys Example with Capsense, Humidty and Temperature Sensors  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow32
    Nios II Simple Socket Server Ethernet Example  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera129
    Odyssey Baseline Pinout  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas9
    Power Management Controller  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera47
    Power Sequence Auto Start (AN 491)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera9
    PWM  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Altera10
    PWM Design  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera133
  QRD - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
      Qsys Intro Lab MAX 10 DECA  TutorialArrow MAX 10 DECAMAX 1016.0.0Altera18
  Reconfigurable Decimator - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
      Remote System Upgrade (RSU) Lab - DECA Version  TutorialArrow MAX 10 DECAMAX 1016.0.0Altera63
      Remote System Upgrade (RSU) Lab - Max 10 Development Kit Version  TutorialMAX 10 FPGA Development KitMAX 1016.0.0Altera79
      Remote System Upgrade (RSU) Lab - NEEK Version  TutorialMAX 10 NEEKMAX 1016.0.0Altera20
    Reset Factory Settings LED Flash - BeMicro  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Arrow42
    Restore Factory Settings LED Flash  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera168
    SDRAM Nios Test - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera10
    SDRAM RTL Test - MAX10 DE10 Lite   Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera3
    Serial Peripheral Interface Master (AN 485)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera88
    Simple PWM - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera9
    Simple PWM Design  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Altera63
    SPI Slave to 6 UART Master  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera102
    SPI Slave to Avalon Master Bridge  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas28
    SPI Slave to Avalon Master Bridge for MAX10 Dev Kit  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera38
  STAP Radar - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
    Stepper Motor Controller (AN 488)  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera75
    Stepper Motor Controller (AN 488) BeMicro  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Arrow26
    Stepper Motor Controller (AN 488) DE10LIte  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera7
    Stepper Motor Controller (AN 488) on the MAX10 Odyssey Development Kit   Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas8
    Stepper Motor Controller (AN488) - Development Kit  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera23
    Stepper Motor Controller for NEEK  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera7
    Stepper Motor Controller with NEEK LCD Display  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera11
    Stepper Motor Design Example on MAX 10 DECA Board  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow24
  TX RX DSP Demo - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
    USB-SD Card Mass-Storage Design  Design Example MAX10 Evaluation Kit Add OnMAX 1016.0.0SLS30
    Using MAX 10 and Nios II to replace Freescale MC9S08 Microcontrollers  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera15
    Using the Internal Oscillator in MAX devices (AN 496)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera43
    Using Tightly Coupled Memory with Nios II Processor for NEEK  Design ExampleMAX 10 NEEKMAX 1016.0.0Intel8
    Utilizing the User Flash Memory (UFM) on Max 10 Devices with a Nios II Processor  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera167
    Utilizing the User Flash Memory (UFM) on Max 10 Devices with a Nios II Processor (DE10 Lite)  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera9
    Utilizing the User Flash Memory (UFM) on Max 10 Devices with a Nios II Processor (NEEK)  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera11
  Variable Decimator - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
    VGA Pattern - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera30
    Voltage Level Shifters (AN 490)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera14
  WCDMA IF Modem - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  WIMAX IF Modem - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0