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  NameCategoryDevelopment KitFamilyQuartus II VersionVendorDownloads
  Adapting Digilent PmodCLP LCD to DE10 Lite Development Kit Arduino Shield Header  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera4
  ADC and Audio Monitor  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas75
  ADC Data Capture with Hardware Streaming using ADC Toolkit Display  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow50
  ADC Data Capture with Nios II Processor  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow63
  ADC example for use with Board Test System Monitor Panel  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera59
  ADC_MIC_LCD  Design ExampleMAX 10 NEEKMAX 1016.0.0Terasic31
  Arrow Max 10 DECA Baseline Pinout  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow17
  Baseline Pinout - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera12
  Basic VGA Controller Design Example  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera0
  Beamforming - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
    Become an FPGA Designer in 4 hour lab solution  TutorialBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Altera58
  BeMicro MAX 10 Kit Baseline Pinout  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Arrow82
  Board Update Portal: Nios II, Flash,DDR3, Triple-Speed Ethernet, UART  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera65
  Cholesky Solver - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  CompactFlash+ Interface (AN 492)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera8
  Crosspoint Switch Matrices in MAX devices (AN 294 - custom example)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera3
  Crosspoint Switch Matrices in MAX devices (AN 294 - switch example)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera3
  Custom Instruction and Nios II Processor   Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera11
  Custom Instruction and Nios II Processor - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera3
  Custom Instruction for MAX 10 Nios II Embedded Evaluation Kit  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera4
  Custom Instruction for Nios II Processor   Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera9
  Custom Instruction for Nios II processor- DECA Board  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Altera9
  Custom Instruction with Nios II   Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Altera16
  Custom Instruction with Nios II Design  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Altera12
  Custom Instruction with Nios II Processor  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera38
  DC-DC Converter Control with ADSP Builder  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Present Power Systems, LLC25
  DDR3 with Board Test System Console  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera25
  DECA USB to SDHC Demo   Design ExampleArrow MAX 10 DECAMAX 1016.0.0Altera9
  Direct RF - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  Dual Boot Design Example - MAX10 DE10 Lite   Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera5
  Dual Boot Design Example for DECA Board  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow10
  Dual Boot Design Example for Odyssey Development Kit   Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Altera18
  Dual Boot Development Kit   Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera38
  Dual Configuration and PWM Controls  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas11
  Dualboot Design Example  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera53
  Dualboot Design Example-BeMicro  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Arrow12
  EBV HyperMax Baseline Pinout  Design ExampleEBV HyperMAXMAX 1016.0.0EBV Elektronik GmbH & Co. KG1
  Echo Cancellation - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  Factory Configuration - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera6
  Farrow - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  FIR Filter - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
    First FPGA Design For MAX10 NEEK Board  TutorialMAX 10 NEEKMAX 1016.0.0Terasic14
    First Nios ii Design Example for MAX 10 NEEK Board  TutorialMAX 10 NEEKMAX 1016.0.0Terasic11
  Folding CFR - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
    FPGA Intro Example with PLL, Mux and Counter  TutorialMAX 10 FPGA Development KitMAX 1016.0.0Altera33
    FPGA Intro Lab with PLL, Mux and Counter  TutorialArrow MAX 10 DECAMAX 1016.0.0Arrow9
  Framebuffer Driven LCD Display  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera19
  Frequency Detect  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas13
  GPIO Pin Expansion Using I2C Bus Interface (AN 494)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera36
  GPIO, QSPI Flash, UART, ADC, LEDs, Switches Design Example  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera130
  GSensor - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera10
  gsensor_lightsonsor_lcd  Design ExampleMAX 10 NEEKMAX 1016.0.0Terasic5
  HDMI_RX_LCD  Design ExampleMAX 10 NEEKMAX 1016.0.0Terasic26
    Hello World Example with Off Chip Memory Usage   TutorialBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Altera41
  Hello World with Nios II LCD  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera30
  humidity_temperature_lcd  Design ExampleMAX 10 NEEKMAX 1016.0.0Terasic8
  I2C Battery Gauge Interface (AN 493)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera13
  I2C Remote System Update Example  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera92
  I2C Template  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas37
  IDE/ATA Controller (AN 495)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera10
  Implementing an SMBus Controller (AN 502)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera9
  Implementing LED drivers in MAX devices (AN 286)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera6
Initialyze test - delete me  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.1Initialyze0
  Introduction to Digital Logic - MAX10 DE10 Lite   TutorialMAX 10 DE10 - LiteMAX 1016.0.0Altera0
  KElm Embedded System On Module Baseline Pinout Design  Design ExampleKElm Embedded System On Module (SoM)MAX 1016.0.0Altera1
  LCD Painter  Design ExampleMAX 10 NEEKMAX 1016.0.0Terasic30
  lcd_camera  Design ExampleMAX 10 NEEKMAX 1016.0.0Terasic13
  LED Blink Using Power Sequencing (AN 498)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera5
  LTE Transmitter - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  MAX 10 ADC with Threshold Violation Detection  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera33
  MAX 10 Evaluation Kit Baseline Pinout  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera106
  MAX 10 NEEK Baseline Pinout  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera10
  MAX 10 Single-Port Triple Speed Ethernet and On-Board PHY Chip Design Example  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera53
  Max10 DDR3 design with debug feature  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera35
  Max10 Development Kit Baseline Pinout  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera58
  MAX10 Remote System Upgrade (RSU) over UART for Nios II Processor  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera49
  Microcontroller I/O Expander (AN 265)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera8
  MIPI CSI2 RX/TX with passive D-PHY  Design ExampleMAX 10 FPGA 10M50 Evaluation Kit MAX 1016.0.0Foresys54
  Motor Control - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  Multi Channel QRD - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  Multiplexing SDIO Devices (AN 509)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera10
  NAND Flash Memory Interface (AN 500)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera12
  NEEK 10 test system - running uC/OS  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera4
    Nios II + Qsys "Hello World" Lab  TutorialMAX 10 FPGA Development KitMAX 1016.0.0Altera59
    Nios II + Qsys "Hello World" Lab - MAX10 DE10 Lite  TutorialMAX 10 DE10 - LiteMAX 1016.0.0Terasic8
  Nios II ADC /LCD Controller Design Example  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera57
  Nios II ADC /LCD Controller Design Example (10M50 Dev Kit)  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera24
  Nios II based Gesture Sensor lab   Design ExampleArrow MAX 10 DECAMAX 1016.0.0Altera15
  Nios II Design Example Using Bluetooth and Wifi  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow9
  Nios II Dual Boot Example for MAX 10 NEEK  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera9
  Nios II Ethernet Simple Socket Server for NEEK  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera13
  Nios II Full Featured Reference Design - BeMicro  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Arrow40
  Nios II On-die Temperature Sensor Design Example  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera25
  Nios II On-die Temp Sensor (Odyssey)  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Altera10
  Nios II On-die Temperature Sensor - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera4
  Nios II On-die Temperature Sensor Design (DECA)   Design ExampleArrow MAX 10 DECAMAX 1016.0.0Altera14
  Nios II On-die Temperature Sensor Design Example (BeMicro)  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Altera46
  Nios II On-die Temperature Sensor Design Example 2  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera28
  Nios II On-die Temperature Sensor/LCD Design Example   Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera35
  Nios II Qsys Example with Capsense, Humidty and Temperature Sensors  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow15
  Nios II Simple Socket Server Ethernet Example  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera48
  Odyssey Baseline Pinout  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas9
  Power Management Controller  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera22
  Power Sequence Auto Start (AN 491)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera3
  PWM  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Altera10
  PWM Design  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera66
  QRD - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
    Qsys Intro Lab MAX 10 DECA  TutorialArrow MAX 10 DECAMAX 1016.0.0Altera8
  Reconfigurable Decimator - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
    Remote System Upgrade (RSU) Lab - DECA Version  TutorialArrow MAX 10 DECAMAX 1016.0.0Altera32
    Remote System Upgrade (RSU) Lab - Max 10 Development Kit Version  TutorialMAX 10 FPGA Development KitMAX 1016.0.0Altera36
    Remote System Upgrade (RSU) Lab - NEEK Version  TutorialMAX 10 NEEKMAX 1016.0.0Altera12
  Reset Factory Settings LED Flash - BeMicro  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Arrow27
  Restore Factory Settings LED Flash  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera76
  SDRAM Nios Test - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera14
  SDRAM RTL Test - MAX10 DE10 Lite   Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera13
  Serial Peripheral Interface Master (AN 485)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera64
  Simple PWM - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera2
  Simple PWM Design  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Altera35
  SPI Slave to 6 UART Master  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera19
  SPI Slave to Avalon Master Bridge  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas28
  SPI Slave to Avalon Master Bridge for MAX10 Dev Kit  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera11
  STAP Radar - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  Stepper Motor Controller (AN 488)  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0Altera34
  Stepper Motor Controller (AN 488) BeMicro  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0Arrow17
  Stepper Motor Controller (AN 488) DE10LIte  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera0
  Stepper Motor Controller (AN 488) on the MAX10 Odyssey Development Kit   Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0Macnica Americas8
  Stepper Motor Controller (AN488) - Development Kit  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera12
  Stepper Motor Controller for NEEK  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera3
  Stepper Motor Controller with NEEK LCD Display  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera5
  Stepper Motor Design Example on MAX 10 DECA Board  Design ExampleArrow MAX 10 DECAMAX 1016.0.0Arrow15
  TX RX DSP Demo - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  USB-SD Card Mass-Storage Design  Design Example MAX10 Evaluation Kit Add OnMAX 1016.0.0SLS0
  Using MAX 10 and Nios II to replace Freescale MC9S08 Microcontrollers  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera8
  Using the Internal Oscillator in MAX devices (AN 496)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera30
  Using Tightly Coupled Memory with Nios II Processor for NEEK  Design ExampleMAX 10 NEEKMAX 1016.0.0Intel0
  Utilizing the User Flash Memory (UFM) on Max 10 Devices with a Nios II Processor  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0Altera82
  Utilizing the User Flash Memory (UFM) on Max 10 Devices with a Nios II Processor (DE10 Lite)  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera7
  Utilizing the User Flash Memory (UFM) on Max 10 Devices with a Nios II Processor (NEEK)  Design ExampleMAX 10 NEEKMAX 1016.0.0Altera5
  Variable Decimator - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  VGA Pattern - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0Altera12
  Voltage Level Shifters (AN 490)  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera8
  WCDMA IF Modem - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0
  WIMAX IF Modem - MAX 10  Design Example \ DSPNon Kit Specific MAX 10 Design ExamplesMAX 1016.0.0Altera0