|Name||First FPGA Design For MAX10 NEEK Board|
|Description||In this design example you will learn how to create a FPGA project on MAX 10 NEEK with QuartusII Software and you will understand the design flow of FPGA design. You will also be aware of how to get started with the Terasic MAX 10 NEEK board. Refer to the lab manual to start from scratch, or download the design example for the solution.|
|Development Kit||MAX 10 NEEK|
|Installation Package|| Download|
Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.
Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.
Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.
At the command-line, type the following command:
Once the process completes, then type:
|Total Downloads||20 (From 17 May 2016 to 13 Mar 2017)|
|Quartus II Version||Download Quartus II v16.0|
Last updated on May 17, 2016, 12:39 p.m.