|Name||Using MAX 10 and Nios II to replace Freescale MC9S08 Microcontrollers|
|Description||The design example is intended as a Freescale MC9S08 Qsys HDL (Verilog) Design Template. The AMC1 is intended to illustrate how an Altera MAX 10 device with Nios II may be used in low cost, automotive and industrial embedded environments.While there is no ISA or binary compatibility in this example when replacing the MC9S08, most of the hardware functionality is available with a Nios II solution.|
|Development Kit||Non Kit Specific MAX 10 Design Examples|
Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.
Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.
Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.
At the command-line, type the following command:
Once the process completes, then type:
|Total Downloads||15 (From 25 May 2016 to 24 Mar 2017)|
|Quartus II Version||Download Quartus II v16.0|
|Quartus II Edition||Standard|
Last updated on May 25, 2016, 5:57 p.m.