|Name||Serial Peripheral Interface Master (AN 485)|
|Description||The serial peripheral interface (SPI) is a widely used, 4-wire, serial communication interface. Applications such as digital audio, digital signal processing, and telecommunication channels require high-speed data streams. The low-power, high-speed Altera MAX 10 FPGA is perfectly suited for an SPI master, external to the host. This application note details the implementation of the SPI master in a MAX 10 FPGA. A microprocessor is used to control the master, which you can use to select a slave device to read and write data to and from it. |
SPI is an industry standard protocol that is widely used in embedded systems for interfacing microprocessors and various devices such as sensors, memory chips, shift registers, port expanders, display drivers, data converters, printers, data storage devices, sensors, and multimedia cards. This interface standard has several advantages:
• Low pin count and simple wiring
• Full-duplex communication for higher throughput (allowing faster communication compared to other protocols such as I2C)
• No addressing; therefore, reduced overhead.
|Development Kit||Non Kit Specific MAX 10 Design Examples|
Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.
Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.
Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.
At the command-line, type the following command:
Once the process completes, then type:
|Total Downloads||88 (From 09 Jun 2016 to 24 Mar 2017)|
|Quartus II Version||Download Quartus II v16.0|
|Quartus II Edition||Standard|
Last updated on June 9, 2016, 12:50 p.m.