Design Store

Remote System Upgrade (RSU) Lab - NEEK Version  

NameRemote System Upgrade (RSU) Lab - NEEK Version
DescriptionThis lab will walk you through creating and programming all of the files needed to perform a remote system upgrade on a Max 10 device. You will start off by programming an external QSPI flash device with the Nios II firmware that will receive data over UART and reprogram the flash. You will then generate and program the factory image for the device. Lastly, a new application image will be created with updated functionality and the user will be walked through remotely upgrading the device with this new image.

The design used in this lab is based off of the design created in AN741: Remote System Upgrade for Max 10 FPGA Devices over UART with the Nios II Processor with some slight modifications to the source code to make it easier to read and use.
Operating SystemBareMetal
IP Core
IP CoreHeading
Altera Dual BootConfiguration
Altera Generic QUAD SPI controllerFlash
Altera ASMI ParallelConfiguration and Programming
Altera EPCQ Serial Flash controller coreOther
Altera SOFT ASMIBLOCKConfiguration and Programming
IRQ MapperInterrupt
IRQ Clock CrosserInterrupt
MM InterconnectMerlin Components
Avalon-ST AdapterStreaming
Avalon-ST Error AdapterStreaming
Memory-Mapped DemultiplexerMemory-Mapped
Memory-Mapped MultiplexerMemory-Mapped
Avalon-ST Handshake Clock CrosserStreaming
Avalon-MM Slave AgentMemory-Mapped
Avalon-ST Single Clock FIFOOn Chip Memory
Avalon-MM Slave TranslatorMemory-Mapped
Memory-Mapped Burst AdapterMemory-Mapped
Avalon-MM Master AgentMemory-Mapped
Memory-Mapped Traffic LimiterMemory-Mapped
Avalon-MM Master TranslatorMemory-Mapped
Memory-Mapped RouterMemory-Mapped
Nios II Gen2 ProcessorNios
Altera On-Chip FlashOn Chip Memory
On-Chip Memory (RAM or ROM)On Chip Memory
Reset ControllerClocks; PLLs and Resets
System ID PeripheralDebug and Performance
UART (RS-232 Serial Port)Serial
FamilyMAX 10
Remote System Upgrade Lab Guide-
AN741: Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor-
Development KitMAX 10 NEEK
Installation Package

Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.

The second means to bring up the project template is through the New Project Wizard (File -> New Project Wizard). After entering the project name and folder on the first panel, the second panel will ask you to specify an empty project or project template. Select project template. You will see a list of Design Templates projects that you have loaded prior as well as various "Baseline Pinout Designs" that contain the pinout and settings for a variety of development kits. If you don't see your design template in the list, click on the link that states install the Design Templates circled below:

Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.

Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.

At the command-line, type the following command:

quartus_sh --platform_install –package <project directory>/neek_rsu_lab.par

Once the process completes, then type:

quartus_sh --platform –name neek_rsu_lab

Total Downloads20 (From 01 Jun 2016 to 21 Jun 2017)
Quartus II VersionDownload Quartus II v16.0
Quartus II EditionStandard

Last updated on June 1, 2016, 11:06 a.m.