Design Store

Power Sequence Auto Start (AN 491)  

CategoryDesign Example
NamePower Sequence Auto Start (AN 491)
DescriptionMany consumer and industrial application systems do not require the FPGA to be powered on at all times. It is preferred to have a design in which the FPGA powers on intermittently, remaining off for most of the cycle. This is especially useful in portable battery-operated systems which can function on a non-continuous periodic task.

Because MAX 10 FPGAs do not require a special power-on sequence, they can be switched on quickly (typically 200s, depending on the logic density). The ability to switch on and off quickly allows you to completely switch off the FPGA and switch it back on using external circuitry. The external circuitry can be a simple RC timer designed for the required delay.

However, if you implement considerable power off time, such a simple RC timer circuit is not practical. This requires very large values of R & C. A counter utilizing capacitors as memory elements extends the power-down period. The FPGA turns on for a very small duration during this power -down period, reads the value in these capacitors, increments the count, and stores them back again before powering down. This cycle repeats itself until the desired count is reached, at which time the FPGA switches on completely. When it switches on in the power-on period, the FPGA executes the task it was designed to accomplish.
Operating SystemNone
IP Core
IP CoreHeading
Internal OscillatorConfiguration and Programming
FamilyMAX 10
Auto Start (Application Note 491)Auto Start (Application Note 491)
MAX 10 Device DocumentationMAX 10 device documentation, including the device handbook, device pin-outs, and pin connection guidelines.
Development KitNon Kit Specific MAX 10 Design Examples
Installation Package

Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.

The second means to bring up the project template is through the New Project Wizard (File -> New Project Wizard). After entering the project name and folder on the first panel, the second panel will ask you to specify an empty project or project template. Select project template. You will see a list of Design Templates projects that you have loaded prior as well as various "Baseline Pinout Designs" that contain the pinout and settings for a variety of development kits. If you don't see your design template in the list, click on the link that states install the Design Templates circled below:

Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.

Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.

At the command-line, type the following command:

quartus_sh --platform_install –package <project directory>/AN491_MAX10.par

Once the process completes, then type:

quartus_sh --platform –name AN491_MAX10

Total Downloads9 (From 01 Jun 2016 to 26 Apr 2017)
Quartus II VersionDownload Quartus II v16.0
Quartus II EditionStandard

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Last updated on June 1, 2016, 3:15 p.m.